مقالات در حوزه‌ی مدارهای مجتمع VLSI و اتصالات میانی (کنفرانس ها)
S. Mohammadi, S. Mohajerzadeh, A. Gholizadeh,F. Salehi, N. Masoumi, "Permeation of nickel nano-dots on carbon nanotubes: Synthesis of 3D CNT-based nano-materials" ACS Applied Materials & Interfaces, pp. 15352-15362 Aug. 2014. 1
 M. Mehri, N. Masoumi “Decomposition of Equal/Unequal Length Coupled Interconnect Step Response with Separate RC, LC, and RL Behaviors,” ICEE2014, May 2014. 2
M. Mehri, N. Masoumi “Quantitative Measures for Electromagnetic Compatibility Analysis of Electronic Systems,” ICEE2014, May 2014. 3
M. Takbiri, N. Masoumi, A. Ghadirian, Z. D. Koozehkanani,improving response of  serpentine delay lines using open-loop resonators,”  ICEE2014, May 2014. 4
M. MOHAMMADI, S. SADEGHI-KOHAN, N. MASOUMI, Z. NAVABI “An Off-line MDSI Interconnect BIST Incorporated in BS 1149.1,”9th IEEE European Test Symposium (ETS), 2014. 5
Z. Shariati, N. Masoumi, and M. Mehri, “A complete solution for Board-Level Signal Integrity Analysis Using IBIS Models,” in 2013 13th Mediterranean Microwave Symposium (MMS), 2013, pp. 1–4. 6
A. R. B. Behrouzian and N. Masoumi, “Arbitrary point transient response of RLC interconnects based on composed Fourier analysis,” in 2013 13th Mediterranean Microwave Symposium (MMS), 2013, pp. 1–4. 7
M. Takbiri, N. Masoumi, M. Mehri, and Z. Daie Koozehkanani, “Crosstalk reduction using open-loop resonators for printed circuit boards traces,” in 2013 13th Mediterranean Microwave Symposium (MMS), 2013, pp. 1–4. 8
M. Gholipour, N. Masoumi, and H. Sheikhassadi, “Analytical Method for Crosstalk Peak Voltage Estimation of MWCNT Interconnects,” 21th Iranian Conference on Electric Engineering, Mashhad, Iran, May 2013. 9
A. Seyedolhosseini, N. Masoumi, and M. Mehri, “VLSI nano-scale interconnect induced crosstalk power estimation,” in 2012 2nd IEEE CPMT Symposium Japan, 2012, pp. 1–4. 10
A. Seyedolhosseini and N. Masoumi, “A waveform soft model extraction method to track wire behavior in nano scale technologies,” in 2013 21st Iranian Conference on Electrical Engineering (ICEE), 2013, pp. 1–4. 11
A. Seyedolhosseini, N. Masoumi, and M. Mehri, “A rigorous analytical method for waveform extraction of fully coupled RLC nano-scale interconnects to PCB traces,” in 2012 Second Conference on Millimeter-Wave and Terahertz Technologies (MMWaTT), 2012, pp. 40–43. 12
M. Gholipour and N. Masoumi, “A comparative study of nanowire crossbar and MOSFET logic implementations,” in 2011 IEEE EUROCON - International Conference on Computer as a Tool, 2011, pp. 1–4. 13
Bagheri and N. Masoumi, “A comprehensive smart and stochastic methodology for optimum wire segmentation in nano scale FPGAs,” in ICM 2011 Proceeding, 2011, pp. 1–6. 14
Z. Farjad and N. Masoumi, “Performance improvement of global interconnects using combined techniques of low swing transceiver and buffer insertion in nano technologies,” in ICM 2011 Proceeding, 2011, pp. 1–6. 15
G. Fattah and N. Masoumi, “Crosstalk in VLSI partially coupled interconnect structures, a comprehensive evaluation,” in 2011 IEEE 15th Workshop on Signal Propagation on Interconnects (SPI), 2011, pp. 15–18. 16
M. Gholipour and N. Masoumi, “Efficient model for delay estimation of MWCNT interconnects,” in ICM 2011 Proceeding, 2011, pp. 1–4. 17
H. Sheikhassadi and N. Masoumi, “A RC model for multiwalled carbon nanotubes as interconnects,” in 2011 IEEE EUROCON - International Conference on Computer as a Tool, 2011, pp. 1–4. 18
N. M. A. Bagheri, “A stochastic evaluation methodology for wire segmentation in FPGAs for optimum performance,” in Electrical Engineering (ICEE), 2011 19th Iranian Conference on, 2011. 19
Z. Farjad and N. Masoumi, “Accurate extraction of inductively-affected delay using an optimized tapered partitioning scheme for global interconnects,” in 2011 IEEE 9th International New Circuits and systems conference, 2011, pp. 138–140. 20
J. S. Soofiani and N. Masoumi, “Area efficient switch box topologies for 3D FPGAs,” in 2011 IEEE 9th International New Circuits and systems conference, 2011, pp. 390–393. 21
H. Sheikhassadi, N. Masoumi, and A. Hakimi, “Crosstalk modeling in multiwalled carbon nanotubes as interconnects using the compact RC model,” in 2011 IEEE 15th Workshop on Signal Propagation on Interconnects (SPI), 2011, pp. 133–136. 22
M. Javadi, N. Masoumi and S. Sheikhaei “A new design technique for propagation delay and power reduction in the CML buffers,” in Electrical Engineering (ICEE), 2011 19th Iranian Conference on, 2011. 23
N. M. A. Bagheri, “A stochastic evaluation methodology for wire segmentation in FPGAs for optimum performance,” in Electrical Engineering (ICEE), 2011 19th Iranian Conference on, 2011, pp. 1–6. 24
N. M. G. Fattah, “A comprehensive evaluation of crosstalk noise in partially coupled nano scale VLSI interconnects,” in Electrical Engineering (ICEE), 2011 19th Iranian Conference on, 2011. 25
M. M. Tohidi and N. Masoumi, “FPGA Leakage Power Reduction Using CLB Clustering Technique,” Proceedings of IEEE International NanoElectronics Conference (INEC2010), City University of Hong Kong, Hong Kong, January 3-8, 2010.   26
M. Zangeneh and N. Masoumi, “Throughput Optimization for Interleaved Repeater-Inserted Interconnects in VLSI Design,” Proceedings of IEEE International NanoElectronics Conference (INEC2010), City University of Hong Kong, Hong Kong, January 3-8, 2010.    27
A. Atghiaee, N. Masoumi1, and P. Zarkesh-Ha, “Nano-Scale Early-Design-Stage Prediction for Crosstalk-Induced Power,” Proceedings of IEEE International NanoElectronics Conference INEC2010, City University of Hong Kong, Hong Kong, January 3-8, 2010.  28
A. Atghiaee, N. Masoumi, and S. Rabiee, “TSV-Aware IDF-Based Power Prediction for FPGA,” Proceedings of IEEE 14th Workshop on Signal Propagation on Interconnects SPI2010, Van Valk Hotel, Hildesheium, Germany, pp. 21-24, May 09-12, 2010.   29
M. M. Tohidi and N. Masoumi, “Interconnect design in nanoscale FPGAs,” in 2010 3rd International Nanoelectronics Conference (INEC), 2010, pp. 639–640. 30
Mahmoud Zangeneh and Nasser Masoumi, “An Analytical Delay Reduction Strategy for Buffer-Inserted Global Interconnects in VDSM Technologies,” Proceeding of IEEE European Conference on Circuit Theory and Design ECCTD 2009, Divan Talya Hotel, Antalya, Turkey, pp. 507-510, August 23 - 27, 2009.  31
Mahmoud Zangeneh and Nasser Masoumi, “Statistical Delay Metrics for Binary RC Tree Interconnects in VDSM Technology,” Proceedings of IEEE ICEE2009, Iran University of Science and Technology, pp. 391-395, May 12-14, 2009.  32
Fargol Hasani and Nasser Masoumi, "Improved Buffer Insertion for Simultaneous Crosstalk-Delay Optimization," Proceeding of ICEE2008, pp. 207-212, Tarbiat Modares University, May 13-15 2008. 33
M.M. Sabri, N. Masoumi, J. Rashed-Mohassel, “High Speed Interconnects Response 34
Fargol Hasani and Dr. Masoumi "Interconnect Sizing and Spacing with Consideration of Buffer Insertion for Simultaneous Crosstalk-Delay Optimization", Proceeding of IEEE International Conference on Design & Technology of Integrated Systems (DTIS 2008), Tuzeur, Tunisia, March 25-28, 2008.   35
Ahmad Atghiaee and Nasser Masoumi, “Prediction for Distribution of Interconnects in Nano-Systems,” Proceeding of 2th International Congress on Nanoscience and Nanotechnology (ICNN), University of Tabriz, Tabriz, Iran, October 28-30, 2008.       36
Davood Fathi and Nasser Masoumi,”An Enhanced Accuracy Modeling Method for Global Interconnects in Nanoscale Technology FPGAs,” Proceeding of 2th International Congress on Nanoscience and Nanotechnology (ICNN), University of Tabriz, Tabriz, Iran, October 28-30, 2008.       Interconnect Design in Nanoscale FPGAs 37
M. Ghahramanian, N. Masoumi, and A. Atghiaee, “A New Net list Generator for Simulation of High Performance Nano-Scale Interconnects,” Proceeding of 2th International Congress on Nanoscience and Nanotechnology (ICNN), University of Tabriz, Tabriz, Iran, October 28-30, 2008.       38
F. Hasani, M. Fathipour, and N. Masoumi, “Numerical Modeling of Nanowire Interconnects,” Proceeding of 2th International Congress on Nanoscience and Nanotechnology (ICNN), University of Tabriz, Tabriz, Iran, October 28-30, 2008.       39
Mehdi Tohodi and Nasser Masoumi, “Leakage Power Reduction in Nanoscale FPGA Structures,” Proceeding of 2th International Congress on Nanoscience and Nanotechnology (ICNN), University of Tabriz, Tabriz, Iran, October 28-30, 2008.       40
Ahmad Atghiaee and Nasser Masoumi, “Predictive Estimation for Distribution of Interconnects,” Proceedings of 12th IEEE Workshop on Signal Propagation on Interconnects (SPI2008), Popes’ Palace, Avignon, France, May 12-15, 2008.   41
Hossein Aghababa and Nasser Masoumi, “Time-Domain Analysis of Carbon Nanotubes,” Proceedings of 12th IEEE Workshop on Signal Propagation on Interconnects (SPI2008), Popes’ Palace, Avignon, France, May 12-15, 2008.   42
M. Ghahramanian, N. Masoumi, and A. Atghiaee, “An Efficient Simulation CAD Tool For Interconnect Distribution Functions,” Proceedings of 12th IEEE Workshop on Signal Propagation on Interconnects (SPI2008), Popes’ Palace, Avignon, France, May 12-15, 2008.   43
Masoud Masoumi, Nasser Masoumi, and Amir Javanpak, “A New and Efficient Approach for Estimating the Time-Domain Response of Capacitive Coupled Distributed RC Interconnects,” Proceedings of 12th IEEE Workshop on Signal Propagation on Interconnects (SPI2008), Popes’ Palace, Avignon, France, May 12-15, 2008.   44
F. Hasani, N. Masoumi, and B. Forouzandeh, “Crosstalk Noise Reduction Techniques Using SOI Substrate,” Proceedings of 12th IEEE Workshop on Signal Propagation on Interconnects (SPI2008), Popes’ Palace, Avignon, France, May 12-15, 2008.   45
Mohammad Moghaddam Tabrizi, Mahsa Deilami, Ahmad Asgari, Nasser Masoumi, “Sensitivity Analysis of Shielded Coupled Interconnects for RFIC Applications,” Proceedings of Canadian Conference on Electrical and Computer Engineering CCECE 2008, Sheraton Fallsview Hotel, Niagara Falls, Canada, pp. 215-218, May 4-7, 2008.   46
Soraya Aghnout and Nasser Masoumi, "Modeling and Quantification of Substrate Noise Induced by Interconnects in SOCs," Proceeding of DTIS 2007 conference, Sep 2-5 Morocco, pp. 1-6. 47
Fargol Hassani, Nasser Masoumi, "Crosstalk and Delay Optimization Techniques for Nano Scale Interconnects," Proceeding of DTIS 2007 conference, Sep 2-5, Morocco, pp. 163-167. 48
Fahimeh Alsadat Hoseini and Nasser Masoumi, "Fast Estimation of Interconnects Delay in RLC Trees Using Neural Network", Proceeding of MWSCAS 2007 Conference, August 5-8, 2007, Montreal, Canada, pp. 1309-1312. 49
Mohammad Moghaddam Tabrizi and Nasser Masoumi, "High Speed Current-Mode Signaling for Interconnects Considering Transmission Line and Crosstalk Effects", Proceeding of MWSCAS 2007 Conference, August 5-8, 2007, Montreal, Canada, pp. 17-20. 50
Mahdieh Mehran and Nasser Masoumi, "A Tapered Partitioning Method for “Delay Energy product” Optimization in Global Interconnects," Proceeding of MWSCAS 2007 Conference, August 5-8, 2007, Montreal, Canada, pp. 21-24. 51
B. Esfandyarpour , E. Soleimani, S. Mohajerzadeh, N. Masoumi, "Growth of Rose-Like ZnO Structures with Nanowire Interconnections," Proceeding of MWSCAS 2007 Conference, August 5-8, 2007, Montreal, Canada, pp. 113-115. 52
S. Hashemi, N. Masoumi, and C. Lucas, “Optimal Clock Skew Scheduling And Topology Design Tolerant To Delay Uncertainty Using Genetic Algorithms,” in Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006., pp. 508–513. 53
M. A. Karami, N. Masoumi, and B. Forouzandeh, “New High Frequency Model For Substrate Crosstalk Noise Injected By SOI Devices,” in Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006., pp. 495–499. 54
Roghayeh Saeidi, Nasser Masoumi, "Clock Skew Reduction by Link-region Technique," published in MWCCAS 2006 Conference, (the 49th IEEE International Midwest Symposium on Circuits and Systems), Island of Enchantment, Puerto Rico, August 6-9, 2006. 55
Soodeh Aghli Moghaddam, Nasser Masoumi, "Simulation of the Novel Gradually Low-K Dielectric Structure for Crosstalk Reduction in VLSI and Comparison with Low-K Technology," published in MWSCAS 2006 Conference, (the 49th IEEE International Midwest Symposium on Circuits and Systems), Island of Enchantment, Puerto Rico, August 6-9, 2006. 56
Fatemeh Kashfi, Nasser Masoumi, "Optimization of Speed and Power in a 16-Bit Carry Skip Adder in 70nm Technology", published in MWCCAS 2006 Conference, (the 49th IEEE International Midwest Symposium on Circuits and Systems), Island of Enchantment, Puerto Rico, pp. 28-31, August 6-9, 2006. 57
M. A. Karami, N. Masoumi, and E. Afjei, “Accelerated Multi-Grid Scheme for Substrate Coupling Modeling and Analysis,” in 2006 International Conference on Microelectronics, 2006, pp. 71–74. 58
M. A. Karami and N. Masoumi, “Middle Surface Approximtaion For Parallel And Distributed Substrate Coupling Analysis,” in Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006., pp. 486–490. 59
S. A. Moghaddam, Dr. N. Masoumi, and Dr. C.Lucas, “The New Mixed Stochastic Power-Supply Noise-Aware Floorplanning Technique,” Proceeding of 13th International Iranian Conference on Electrical Engineering (ICEE2005),Vol. 1, pp. 385-388, Zanjan, Iran, May 10-12, 2005. 60
B. Khadem Hosseineih, N. Masoumi, “A Comprehensive Model for On-Spiral Inductors,” Proceeding of IWSOC 2005 (5th International Workshop on System –on-chip), pp.127-131, Banff, Alberta – Canada, July 24-27, 2005. 61
Jaber Derakhshandeh, Nasser Masoumi, “A precise Model for Leakage Power Estimation in VLSI Circuit,” Proceeding of IWSOC 2005 (5th International Workshop on System –on-chip), pp.337-340, Banff, Alberta – Canada, July 24-27, 2005. 62
S. A. Moghaddam, Dr. N. Masoumi, and Dr. C.Lucas, “A Stochastic Power-supply Noise Reduction Technique Using Max-Flow Algorithm and Decoupling Capacitances,” Proceeding of  IWSOC 2005 (5th International Workshop on  System –on-chip), pp.265-269,  Banff, Alberta – Canada, July 24-27, 2005. 63
Sedighe Hashemi, Zahra Safarian, Nasser Masoumi, “Modeling of On-Chip Spiral Inductors,” Proceeding of ICM 2005 (17th International Conference on Microelectronics), pp.75-81, Islamabad, Pakistan, Dec. 13-15, 2005. 64
Soodeh Aghli Moghaddam, Nasser Masoumi, Parviz Jabbedar, and Amirahmad hishegar, “Analysis and Simulation of a Novel Gradually Low-K Dielectric Structure for Crosstalk Reduction in VLSI,” Proceeding of ICM 2005 (17th International Conference on Microelectronics), pp.110-115, Islamabad, Pakistan, Dec. 13-15, 2005. 65
N. Masoumi, J. Ghasemi, M. Ahmadian, F. Raissi, and M. Masoumi, “Enhancing performance and saving energy in CMOS DCVSL gates by using a new transistor sizing algorithm,” in Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC’05), 2005, pp. 283–288. 66
Behzad Eghbalkhah, Nasser Masoumi, “The Effects of Different Parameters in Crosstalk Noise Modeling,” Proceeding of ICM 2005 (17th International Conference on Microelectronics), pp.106-109, Islamabad, Pakistan, Dec. 13-15, 2005. 67
Y. Koolivand, A. Zahabi, and N. Masoumi,  “Modeling of Polysilicide Gate Resistance Effect on Inverter Delay and Power Consumption Using Distributed RC Method and Branching Technique,” Proceedings of GLSVLSI, pp. 149-153, Boston, Massachusetts, USA, April 26-28, 2004. 68
M. Taherzadeh-Sani, A.-M. Nasri-Nasrabadi, and N. Masoumi, “A Reduced-Order Modeling Technique for Substrate Coupling in Mixed-Signal VLSI,” Proceedings of 12th Iranian Conference on Electrical Engineering (ICEE2004), Vol. 1, pp. 91-95, Mashhad, Iran, May 11-13, 2004. 69
M. Moghaddam Tabrizi, E. Fathi, N. Masoumi, M. Fathipour, Y. Mortazavi, and M.R. Ghaderi, “A New Methodology For Substrate Network Resistance Extraction in RFCMOS,” Proceedings of ANTEM 2004, pp. 71-75, July, 2004. 70
N. M. Madani and N. Masoumi, “A new optimization method for CTMDP system-level power management techniques,” in Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004., pp. 215–218. 71
M. M. Tabrizi, E. Fathi, M. Fathipour, and N. Masoumi, “Extracting of substrate network resistances in RFCMOS transistors,” in Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004., pp. 219–222. 72
B. kheradmand-Boroujeni and N. Masoumi, “A new large capacttyve-load driver circuit for low voltage CMOS VLSI,” in IEEE International Workshop on Biomedical Circuits and Systems, 2004., pp. 5–8 73
Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini, and H. Hadi”A Novel Analytical model for Evaluation of Substrate Crosstalk in VLSI circuits,” Proceedings of International Workshop on Electronic Design, Test and Applications, pp. 355-359, Jan. 2002. 74
Nasser Masoumi, Mohamed I. Elmasry, and Safieddin Safavi-Naeini, ”An Image Method Based Fast-Convergent Green’s Function for Rapid Extraction of Substrate Crosstalk Elements,” Proceedings of International Workshop on System on Chip for Real-Time Applications (IWSOC 2002), pp. 217-235, Banff, AB, Canada, July 2002. 75
N. Masoumi, S. Safavi-Naeini, M.I. Elmasry and M. Sachdev, “A Methodology for Analysis of Substrate Coupling in VLSI Using an Image Based Green’s Function for Modeling,” IEEE Electro/Information Technology Conference, Rochester, Michigan, June 2001. 76
N. Masoumi, M. I. Elmasry, and S. Safavi-Naeini, “A Fast-Convergent Green’s Function For Substrate Coupling Modeling with Application to Analysis of a Mixed-Signal RFIC,” Proceedings of Micronet R & D Annual, pp. 41-42, April 2001. 77
Nasser Masoumi, Mohamed I. Elmasry, and Safieddin Safavi-Naeini, "Substrate-Coupling Noise Analysis of a Mixed-Signal RF IC Using an Efficient Technique for Substrate Parasitic Extraction," Proceedings of International Conference on Circuits, Systems, Communications, and Computers (CSCC 2001), pp. 328-334, July 2001. 78
Nasser Masoumi, Mohamed I. Elmasry, and Safieddin Safavi-Naeini, "Modeling Techniques for Substrate Coupling for a System-On-A-Chip,” Proceedings of International Conference on Microelectronics (ICM 2001), pp. 35-38, Oct. 2001. 79
Nasser Masoumi, Safieddin Safavi-Naeini, and Mohamed I. Elmasry,” Efficient Green’s Functions for Substrate Coupling Modeling in VLSI Systems,” Proceedings of Eleventh International Conference on Very large Scale Integration, Systems A Chip (VLSI-SOC 2001), pp. 152-157, Dec. 2001. 80
Nasser Masoumi, Safieddin Safavi-Naeini, Mohamed I. Elmasry, and Y. L. Chow, “A Semi-Analytical Quasi-Static Approach for Substrate Coupling Modeling in VLSI Circuits,” Proceedings of International Conference on Microelectronics (ICM 2000), pp. 157-160, Nov. 2000. 81
Nasser Masoumi, Safieddin Safavi-Naeini, and Mohamed I. Elmasry, “An Efficient and Accurate Model for RF/Microwave Spiral Inductors Using Microstrip Lines Theory,” Proceedings of IEEE International Conference on Computer Design (ICCD 2000), pp. 127-132, Sep. 2000. 82
Nasser Masoumi, Mohamed I. Elmasry, and Safieddin Safavi-Naeini, “An Efficient Technique for Substrate Coupling Parasitic Extraction with Application to RF/Microwave Spiral Inductors,” Proceedings of International Conference on Microelectronics (ICM 2000), pp. 153-156, Nov. 2000. 83
Nasser Masoumi, Mohamed I. Elmasry, and Safieddin Safavi-Naeini, “A Fast Parametric Model for Contact-Substrate Coupling,” Proceedings of Tenth International Conference on Very large Scale Integration, Systems on A Chip (VLSI-SOC 1999), Kluwer Academic Publications,  pp. 69-76, Dec. 1999. 84
Nasser Masoumi, Safieddin Safavi-Naeini, and Mohamed I. Elmasry “Accurate Modeling of Substrate Coupling in Simple Structures,” Proceedings of Micronet Annual Workshop, pp. 122-123, April 1999 85
F. Hasani, N. Masoumi, “Crosstalk Reduction Techniques for Nano Scale Interconnects,” چاپ شده در مجموعه مقالات اولین کنفرانس فناوری نانو منطقه جنوب کشور- بهمن 1385 86
S. Mohammadi, N. Masoumi, Nanowires in Array-Based Architectures as Interconnection"، چاپ شده در مجموعه مقالات اولين كنفرانس فناوري نانو منقطه جنوب كشور، بهمن 1385. 87

 

مجلات داخلی
مقالات در حوزه‌ی مدارهای مجتمع VLSI و اتصالات میانی (کنفرانس ها)
88 مسعود معصومی، ناصر معصومی، و امیر جوانپاک، یک روش جدید برای تخمین دقیق پاسخ حوزه زمان اتصالات میانی خازنی- مقاومتی در مدارات VLSI،" مجموعه مقالات شانزدهمین کنفرانس مهندسی برق ایران ICEE-2008، صفحات 201 الی 206، دانشگاه تربیت مدرس، اردیبهشت 1387
89 سوده عقلي مقدم، ناصر معصومي، "مدل سازي الكتريكي نانو لوله هاي كربني  تك جداره فلزي به عنوان اتصالات مباني در مدارهايVLSI"، چاپ شده در مجموعه مقالات اولين كنفرانس فناوري نانو منقطه جنوب كشور، بهمن 1385.
90 سيد مهبد تولايي، فتانه تقي ياره، ناصر معصومي، "نقاط قوت، نقاط ضعف، فرصت ها و تهديدهاي پارك هاي علمي ايران؛ تاثيرات فناوري هاي جديد"،  رشد فناوري،فصلنامه تخصصي پاركها و مراكز رشد، سال دوم¸شماره 8، پاييز 1385.
91 مسعود معصومی، ناصر معصومي و محمد جواد قاسمی ، "کاربرد الگوریتم ژنتیک برای بهینه سازی ابعاد ترانزسیستورها در مدارهای مجتمع دیجیتال با توپولوژیDCVSL،مجموعه مقالات دوازدهمین کنفرانس مهندسی برق ایران(ICEE2005)، جلد 1، صفحات 135 تا 140، زنجان ، ایران،20 الی 22 اردیبهشت، 1384.
92 يارالله کوليوند، علی ذهبی و ناصر معصومی، "مدل‌سازي اثر مقاومت پلی سيليسايدی گيت روی تاخير و مصرف توان وارونگرها با استفاده از روش  RCتوزيع‌شده و کاربرد تکنيک انشعاب‌سازي در افزايش کارايی مدار"، مجموعه مقالات دوازدهمین کنفرانس مهندسی برق ایران(ICEE 2004)، جلد 1، صفحات 13تا 19، مشهد، ایران، 22 الی 24 اردیبهشت، 1383.
93 مسعود معصومی، محمد جواد قاسمی و ناصر معصومي، " تمام جمع کنندة تفاضلي 0.31ns درتکنولوژيCMOS 0.5 µm"، مجموعه مقالات دوازدهمین کنفرانس مهندسی برق ایران(ICEE 2004)، جلد 1، صفحات 41 تا 45، مشهد، ایران، 22 الی 24 اردیبهشت، 1383.
94 سوده عقلی مقدم، ناصر معصومی، کارو لوکس، "چینش بلوک ها با هدف کاهش نویز منبع تغذیه به کمک تکامل شبیه سازی شده فازی"، مجموعه مقالات(CD)  ششمین کنفرانس سیستم های هوشمند، کرمان، دانشگاه شهید باهنر،  ایران، 4 و 5 آذر، 1383